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AU9381 usb flash disk controller technical reference manual revision 1.2 ? 1997-2003 alcor micro corp. all rights reserved
copyright notice copyright 1997 - 2003 alcor micro corp. all rights reserved. trademark acknowledgements the company and product names mentioned in this document may be the trademarks or registered trademarks of their manufacturers. disclaimer alcor micro corp. reserves the right to change this product without prior notice. alcor micro corp. makes no warranty for the use of its products and bears no responsibility for any error that appear in this d ocument. specifications are subject to change without prior notice. contact information: web site: http://www.alcormicro.com/ taiwan alcor micro corp. 4f-1, no 200 kang chien rd., nei hu, taipei, taiwan, r.o.c. phone: 886-2-8751-1984 fax: 886-2-2659-7723 santa clara office los angeles office 2901 tasman drive, suite 206 9400 seventh st., bldg. a2 santa clara, ca 95054 rancho cucamonga, ca 91730 usa usa phone: (408) 845-9300 phone: (909) 483-9900 fax: (408) 845-9086 fax: (909) 944-0464
table of contents i table of contents 1.0 introduction-------------------------------------------------------------------------------------- 1 1.1 description---------------------------------------------------------------------------------- 1 1.2 features-------------------------------------------------------------------------------------- 1 2.0 application block diagram----------------------------------------------------------------- 3 3.0 pin assignment-------------------------------------------------------------------------------- 5 4.0 system architecture and reference design----------------------------------------- 9 4.1 AU9381 block diagram------------------------------------------------------------------ 9 4.2 sample schematics------------------------------------------------------------------------ 10 5.0 electrical characteristics------------------------------------------------------------------- 13 5.1 recommended operating conditions------------------------------------------------- 13 5.2 general dc characteristics ------------------------------------------------------------ 13 5.3 dc electrical characteristic for 3.3 volts operation ------------------------------- 13 5.4 crystal oscillator circuit setup for characteristics ------------------------------ 14 5.5 esd test results -------------------------------------------------------------------------- 15 5.6 latch-up test results ------------------------------------------------------------------- 16 6.0 mechanical information---------------------------------------------------------------------- 19 7.0 appendix- a-64 pin lqfp package ----------------------------------------------------- 21 8.0 errata ---------------------------------------------------------------------------------------------- 27
table of contents i
introduction 1 1.0 introduction 1.1 description the AU9381 is a highly integrated single chip usb flash disk controller. it provides the most cost effective bridge between usb enabled pc and nand type flash memory. AU9381 can be used as a removable storage disk in enormous data exchange applications between pc, macintosh, laptop and workstation. it can also be configured as a bootable disk for system repairing . the AU9381 can work with 1 to 8 nand type flash memory chip with the combination of any popular flash memory type - 8m, 16m, 32m, 64m and 128m. additional features include write protection switch, activity led and password protected security . the AU9381 integrated 48mhz pll, 3.3v regulator, power on reset circuit and a power switch for flash memory power control. 1.2 features fully compliant with usb v1.1 specification and usb device class definition for mass storage, bulk-transport v1.0 work with default driver from windows me, windows 2000, windows xp, mac os 9.1, and mac os x. windows 98se is supported by vendor driver from alcor. multiple fifo implementation for concurrent bus operation 64-pin package supports to 8 pieces nand flash memory chip; total capacity reaches to 2g byte when working with 1g bit mono dies chip. 48-pin package supports to 4 pieces nand flash memory chip; total capacity reaches to 1g byte. support mixed different size nand flash vendor id, product id and strings can be customized by utility software from alcor can be configured to support dual partitions with dynamic logic disk space allocation. security function supported with password protection led for bus activity monitoring runs at 12mhz, built-in 48 mhz pll built-in 3.3v regulator built-in power switch and power management circuit to achieve 500ua suspend current required by usb specification. built-in power on reset circuit
introduction 2 dedicated dma engine to ensure highest throughput in read and write 48-pin lqfp package as standard package and 64-pin lqfp package for choice.
application block diagram 3 2.0 application block diagram following is the application diagram of a typical flash disk product with AU9381. by connecting the flash disk to a desktop or notebook pc thro ugh usb bus, au 9381 is implemented as a bus-powered, full speed usb disk, which can be used as a bridge for data transfer between desktop pc and notebook pc. pc wit h usb host cont roll er pc wi th usb host cont rol ler notebook with usb host controller
application block diagram 4
pin assignment 5 3.0 pin assignment the AU9381 is packed in 48-pin lqfp form factor. the figure on the following page shows the signal names for each of the pins on the chip. accompanying the figure is the table that describes each of the pin signals. 1 2 3 5 4 6 7 8 10 9 11 33 32 31 29 30 34 46 45 44 43 42 12 35 36 28 27 26 25 41 40 39 38 37 47 48 13 14 15 16 17 18 19 20 21 22 23 24 vcca gnda xtal1 xtal2 vcc2fm vcc5v vccio rstn usb_dp usb_dm gndi o reserved fmwpn fmwrn fmale fmcle fmce1n fmce2n fmrdn fmrbn gpon7 reserved nc reserved gpon6 fmce3n fmce4n vcck gndk ct3 ct4 ct2 reserved nc ct1 reserved reserved fmdata4 fmdata5 fmdata6 fmdata7 fmdata0 fmdata1 fmdata2 fmdata3 reserved reserved reserved alcor micro AU9381 48pin lqfp
pin assignment 6 table 3-1. pin descriptions pin pin name i/o type description 1 vcca pwr 3.3v input for pll 2 gnda pwr ground 3 xtal1 i crystal oscillator input (12mhz) 4 xtal2 o crystal oscillator output (12mhz) 5 vcc2fm o connect to flash memory vcc 6 vcc5v pwr 5v power supply 7 vccio pwr regulator 3.3v output/ io 3.3v input 8 rstn i hardware reset (active low) 9 usb_dp i/o usb d+ 10 usb_dm i/o usb d- 11 gndio pwr ground 12 reserved reserved 13 reserved reserved 14 fmwpn i connect to flash memory write protect 15 fmwrn o connect to flash memory write enable 16 fmale o connect to flash memory address latch enable 17 fmcle o connect to flash memory command latch enable 18 fmce1n o connect to flash memory chip1 enable 19 fmce2n o connect to flash memory chip2 enable 20 fmrdn o connect to flash memory read enable 21 fmrbn i connect to flash memory ready/busy output 22 gpon7 o general purpose output pin, used as activity led 23 reserved reserved 24 nc 25 gpon6 o floating 26 fmce3n o connect to flash memory chip3 enable 27 fmce4n o connect to flash memory chip4 enable 28 vcck pwr core 3.3v input 29 gndk pwr ground 30 ct3 connect to vcc 31 ct4 connect to ground 32 ct2 connect to ground 33 ct1 connect to ground 34 reserved connect to ground 35 reserved connect to ground
pin assignment 7 36 nc 37 reserved reserved 38 fmdata4 i/o connect to flash memory data io4 39 fmdata5 i/o connect to flash memory data io5 40 fmdata6 i/o connect to flash memory data io6 41 fmdata7 i/o connect to flash memory data io7 42 fmdata0 i/o connect to flash memory data io0 43 fmdata1 i/o connect to flash memory data io1 44 fmdata2 i/o connect to flash memory data io2 45 fmdata3 i/o connect to flash memory data io3 46 reserved reserved 47 reserved reserved 48 reserved reserved
system architecture and reference design 8
system architecture and reference design 9 4.0 system architecture and reference design 4.1 AU9381 block diagram alcor micro - AU9381 flash memory card reader block diagram fm control & fifo usb sie usb upstream port xcvr usb fifo 3.3 v voltage regulator & power off 3.3 v ram processor rom 12mhz xtal support up to 8 flash memory suspend
system architecture and reference design 10 4.2 sample schematics fmrdn gndk c4 0.1uf r1 1.5k r2 39 fmio[0..7] gpon7 fmce1n vcck c7 0.1uf vcc gpon7 gnda c5 18pf r5 1m fmwrn xtal2 y1 12mhz vcc3.3 xtal1 fmce3n vcc2fm xtal2 c8 0.1uf vcc2fm fmale a 12 wednesday, april 02, 2003 1.00 AU9381 4 flash memory demostration schematic size document number rev date: sheet of fmrbn r3 39 c3 1uf u1 AU9381-48 pin 1 2 3 4 5 6 7 8 9 10 11 13 14 15 16 17 18 19 20 21 22 23 25 26 27 28 29 30 31 32 33 34 35 37 38 39 40 41 42 43 44 45 46 47 12 24 36 48 vcca gnda xtal1 xtal2 vcc2fm vcc5v vccio rstn usb_dp usb_dm gndio reserved fmwpn fmwrn fmale fmcle fmce1n fnce2n fmrdn fmrbn gpon7 reserved gpon6 fmce3n fmce4n vcck gndk reserved reserved reserved reserved reserved reserved reserved fmio4 fmio5 fmio6 fmio7 fmio0 fmio1 fmio2 fmio3 reserved reserved reserved reserved reserved reserved f1 fb vcc3.3 gndk j1 1 2 3 4 5 vcc data- data+ gnd fgnd1 disclaimer: this schematic is for reference only. alcor micro corp. makes no warranty for the use of its products and bears no responsibility for any error that appear in this document. specifications are subject to change without notice. d1 fmce2n vcc3.3 gnda vcca vcc5v r4 47k c6 18pf vcc5v c9 0.1uf sw1 2 1 3 r6 330 c2 10uf vcca vcck vcc3.3 f2 fb fmce4n vcc fmcle c1 0.1uf xtal1 vcc3.3 vcc3.3
electrical characteristics 11 fmio5 fmcle fmwrn fmce2n fmio0 fmio3 fmio3 vcc2fm fmrbn cb2 0.1uf fmio7 fmale fmio1 fmio6 fmio1 fmcle fmio1 fmio0 fmio4 fmio2 fmio[0..7] vcc2fm fmale fmce2n fmio4 cb1 0.1uf fmio5 fmio1 fmrbn fmale vcc2fm cb4 0.1uf fmio3 a 22 wednesday, april 02, 2003 1.00 AU9381 4 flash memory demostration schematic size document number rev date: sheet of fmio4 fmwrn cb3 0.1uf u2 k9f5608u0a-ycb0 29 30 31 32 41 42 43 44 6 13 36 12 37 7 8 9 16 17 18 19 i/o0 i/o1 i/o2 i/o3 i/o4 i/o5 i/o6 i/o7 gnd vss vss vcc vcc r/b re ce cle ale we wp fmio4 fmio2 u3 k9f5608u0a-ycb0 29 30 31 32 41 42 43 44 6 13 36 12 37 7 8 9 16 17 18 19 i/o0 i/o1 i/o2 i/o3 i/o4 i/o5 i/o6 i/o7 gnd vss vss vcc vcc r/b re ce cle ale we wp fmio6 fmio6 vcc2fm fmio6 fmwrn fmce1n fmio0 fmio3 fmrdn fmcle fmrdn u5 k9f5608u0a-ycb0 29 30 31 32 41 42 43 44 6 13 36 12 37 7 8 9 16 17 18 19 i/o0 i/o1 i/o2 i/o3 i/o4 i/o5 i/o6 i/o7 gnd vss vss vcc vcc r/b re ce cle ale we wp fmrdn fmce1n vcc2fm fmio5 fmio5 fmio7 u4 k9f5608u0a-ycb0 29 30 31 32 41 42 43 44 6 13 36 12 37 7 8 9 16 17 18 19 i/o0 i/o1 i/o2 i/o3 i/o4 i/o5 i/o6 i/o7 gnd vss vss vcc vcc r/b re ce cle ale we wp fmio7 fmio2 vcc2fm fmrbn fmrbn disclaimer: this schematic is for reference only. alcor micro corp. makes no warranty for the use of its products and bears no responsibility for any error that appear in this document. specifications are subject to change without notice. fmrdn fmale fmio7 vcc2fm fmio2 fmwrn fmio0 fmcle vcc2fm
electrical characteristics 12
electrical characteristics 13 5.0 electrical characteristics 5.1 recommended operating conditions symbol parameter min typ max units v cc power supply 4.75 5 5.25 v v in input voltage 0 v cc v t opr operating temperature 0 85 o c t stg storage temperature -40 125 o c 5.2 general dc characteristics symbol parameter conditions min typ max units i il input low current no pull-up or pull-down -1 1 a i ih input high current no pull-up or pull-down -1 1 a i oz tri-state leakage current -10 10 a c in input capacitance 5 f c out output capacitance 5 f c bid bi-directional buffer capacitance 5 f 5.3 dc electrical characteristics for 3.3 volts operation symbo l parameter conditions min typ max units v il input low voltage cmos 0.9 v v ih input hight voltage cmos 2.3 v v ol output low voltage i ol =4ma, 16ma 0.4 v v oh output high voltage i oh =4ma,16ma 2.4 v r i input pull-up/down resistance vil=0 v or vih=v cc 10k/200k k ?
electrical characteristics 14 5.4 crystal oscillator circuit setup for characterization the following setup was used to measure the open loop voltage gain for crystal oscillator circuits. the feedback resistor serves to bias the circuit at its quiescent operating point and the ac coupling capacitor, cs, is much larger than c1 and c2.
electrical characteristics 15 5.5 esd test results test description : esd testing was performed on a zapmaster system using the human- body ?model (hbm) and machine-model (mm), according to mil_std 883 and eiaj ic_121 respectively. human-body-model stress devices by sudden application of a high voltage supplied by a 100 pf capacitor thro ugh 1.5 kohm resistance. machine-model stresses devices by sudden application of a high voltage supplied by a 200 pf capacitor thro ugh very low (0 ohm) resistance test circuit & condition zap interval : 1 second number of zaps : 3 positive and 3 negative at room temperature critera : i-v curve tracing model model s/s target results hbm vdd, vss, i/c 15 4000v pass mm vdd, vss, i/c 15 200v pass
electrical characteristics 16 5.6 latch-up test results test description: latch-up testing was performed at room ambient using an imcs-4600 system which applies a stepped voltage to one pin per device with all other pins open except vdd and vss which were biased to 5 volts and ground respectively. testing was started at 5.0 v (positive) or 0 v(negative), and the dut was biased for 0.5 seconds. if neither the put current supply nor the device current supply reached the predefined limit (dut=0 ma , icc=100 ma), then the voltage was increased by 0.1 volts and the pin was tested again. this procedure was recommended by the jedec jc-40.2 cmos logic standardization committee. notes: 1. dut: device under test. 2. put: pin under test. vcc dut gnd pin under m untested output open circuit untested input tied to v supply trigger sou r ce v su pp l y + + icc measurement 1 source test circuit : positive input/ output overvoltage /overcurrent
electrical characteristics 17 vcc dut gnd pin under test ma untested output open circuit untested input tied to v supply trigger source v supply + + icc measurement test circuit : negative input/ output overvoltage /overcurrent 1 source vcc dut gnd ma untested output open circuit all input tied to v supply v supply + icc measurement supply voltage test latch?up data model model voltage (v)/ current (ma) s/s results + voltage - 11.0 11.0 5 pass + current - 200 200 5 vdd-vxx 9.0 5 pass
pin assignment 18
pin assignment 19 6.0 mechanical information following diagrams show the dimensions of the AU9381 48-pin lqfp and 64-pin lqfp. measurements are in inches. body size lead d1 e1 count a1 a2 l1 b c e 7 7 48 0.1 1.4 1 0.2 0.127 0.5 10 10 64 0.1 1.4 1 0.2 0.127 0.5 a1 stand-off a2 body thickness l1 lead length b lead width c lead thickness e lead pitch
pin assignment 20
pin assignment 21 7.0 appendix-a-64 pin lqfp package 7.1 64 lqfp pin assignment alcor micro AU9381 64 pin lqfp reserved vcca gnda xtal1 xtal2 v cc2fm vcc5v vcc3v rstn usb_dp usb_dm gndio reserved reserved reserved reserved 7 13 33 35 34 39 38 37 42 41 40 44 43 47 46 45 48 36 fmrdn fmwrn fmale fmcle fmce1n fmce2n fmrbn gpon7 eepdata eepclk reserved reserved reserved reserved reserved fmwpn 61 60 59 58 57 56 55 54 53 52 51 50 49 62 64 63 reserved reserved gpi4 fmcdn ct1 ct2 ct4 ct3 gndk vcck fmce4n fmce3n gpon6 reserved reserved reserved fmce5n fmdata3 fmdata2 fmdata1 fmdata0 fmdata7 fmdata6 fmdata5 fmdata4 gpi0 fmce6n fmce7n gpi2 gpi3 gpi1 fmce8n 32 20 21 22 23 24 25 26 27 28 29 30 31 16 14 15 10 11 12 8 9 5 6 2 3 4 1 19 17 18
pin assignment 22 7.2 64 lqfp pin descriptions pin pin name i/o type description 1 reserved reserved 2 reserved reserved 3 vcca pwr analog 3.3v input 4 gnda pwr ground 5 xtal1 i crystal oscillator input (12mhz) 6 xtal2 o crystal oscillator output (12mhz) 7 vcc2fm o connect to flash memory vcc 8 vcc5v pwr 5v power supply 9 vcc3v pwr regular 3.3v output/ io 3.3v input 10 rstn i hardware reset (active low) 11 usb_dp i/o usb d+ 12 usb_dm i/o usb d- 13 gndio pwr ground 14 reserved reserved 15 reserved reserved 16 reserved reserved 17 reserved reserved 18 reserved reserved 19 fmwpn i connect to flash memory write protect 20 fmwrn o connect to flash memory write enable 21 fmale o connect to flash memory address latch enable 22 fmcle o connect to flash memory command latch enable 23 fmce1n o connect to flash memory chip1 enable 24 fmce2n o connect to flash memory chip2 enable 25 fmrdn o connect to flash memory read enable 26 fmrbn i connect to flash memory ready/busy output 27 gpon7 o general purpose output pin, used as activity led 28 eepdata i/o connect to i2c serial data 29 eepclk o connect to i2c serial clock input 30 reserved reserved 31 reserved reserved 32 reserved reserved 33 reserved reserved 34 reserved reserved
pin assignment 23 35 gpon6 o floating 36 fmce3n o connect to flash memory chip3 enable 37 fmce4n o connect to flash memory chip4 enable 38 vcck pwr core 3.3v input 39 gndk pwr ground 40 ct3 i connect to vcc 41 ct4 i connect to vcc 42 ct2 i connect to ground 43 ct1 i connect to ground 44 fmcdn i flash memory mode: connect to gound 45 gpi4 i connect to ground. 46 reserved reserved 47 reserved reserved 48 reserved reserved 49 gpi3 i connect to ground. 50 gpi2 i connect to ground. 51 gpi1 i connect to ground. 52 gpi0 i connect to ground. 53 fmdata4 i/o connect to flash memory data io4 54 fmdata5 i/o connect to flash memory data io5 55 fmdata6 i/o connect to flash memory data io6 56 fmdata7 i/o connect to flash memory data io7 57 fmdata0 i/o connect to flash memory data io0 58 fmdata1 i/o connect to flash memory data io1 59 fmdata2 i/o connect to flash memory data io2 60 fmdata3 i/o connect to flash memory data io3 61 fmce5n o connect to flash memory chip5 enable 62 fmce6n o connect to flash memory chip6 enable 63 fmce7n o connect to flash memory chip7 enable 64 fmce8n o connect to flash memory chip8 enable
system architecture and reference design 24 7.3 sample schematics fmce8n u1 AU9381-64 pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 reserved reserved vcca gnda xtal1 xtal2 vcc2fm vcc5v vcc3v rstn usb_dp usb_dm gndio reserved reserved reserved reserved reserved fmwpn fmwrn fmale fmcle fmce1n fmce2n fmrdn fmrbn gpon7 eepdata eepclk reserved reserved reserved reserved reserved gpon6 fmce3n fmce4n vcck gndk ct3 ct4 ct2 ct1 fmcdn gpi4 reserved reserved reserved gpi3 gpi2 gpi1 gpi0 fmdata4 fmdata5 fmdata6 fmdata7 fmdata0 fmdata1 fmdata2 fmdata3 fmce5n fmce6n fmce7n fmce8n xtal2 xtal1 vcc3.3 d1 c4 0.1uf fmce3n sw2 2 1 3 c9 0.1uf gnd vcc3.3 r3 39 vcc3.3 vcca r1 1.5k f2 fb eepdata fmce2n fmale c8 18pf a 13 friday, april 25, 2003 1.00 AU9381 64 pin 8 flash memory demostration schematic size document number rev date: sheet of gpon7 gndk fmcdn fmdata[0..7] vcc fmrbn fmrdn fmce6n fmce5n r5 330 vcc3.3 eepclk fmcle r2 39 r7 1m eepdata gnda vcc2fm r6 47k xtal1 vcc2fm fmce1n optioanl u2 24c02 or compatible 1 2 3 4 5 6 7 8 a0 a1 a2 gnd sda scl wp vcc vcck c1 0.1uf eepclk fmwrn vcc3.3 c5 0.1uf r4 47k c10 1uf xtal2 y1 12mhz vcc3.3 vcc3.3 f1 fb vcca disclaimer: this schematic is for reference only. alcor micro corp. makes no warranty for the use of its products and bears no responsibility for any error that appear in this document. specifications are subject to change without notice. vcck vcc5v fmce4n c3 1uf vcc5v j1 1 2 3 4 5 vcc data- data+ gnd fgnd1 c2 10uf gnd vcc3.3 fmce7n c7 0.1uf vcc gpon7 c6 18pf
mechanical information 25 fmce4n fmwrn vcc2fm cb1 0.1uf fmrdn fmrbn fmrbn fmdata[0..7] fmwrn fmdata[0..7] cb4 0.1uf vcc2fm fmrdn fmrdn fmale fmce2n cb3 0.1uf fmce3n vcc2fm vcc2fm u6 k9f5608u0a-ycb0 29 30 31 32 41 42 43 44 6 13 36 12 37 7 8 9 16 17 18 19 i/o0 i/o1 i/o2 i/o3 i/o4 i/o5 i/o6 i/o7 gnd vss vss vcc vcc r/b re ce cle ale we wp u3 k9f5608u0a-ycb0 29 30 31 32 41 42 43 44 6 13 36 12 37 7 8 9 16 17 18 19 i/o0 i/o1 i/o2 i/o3 i/o4 i/o5 i/o6 i/o7 gnd vss vss vcc vcc r/b re ce cle ale we wp vcc2fm u5 k9f5608u0a-ycb0 29 30 31 32 41 42 43 44 6 13 36 12 37 7 8 9 16 17 18 19 i/o0 i/o1 i/o2 i/o3 i/o4 i/o5 i/o6 i/o7 gnd vss vss vcc vcc r/b re ce cle ale we wp cb2 0.1uf fmwrn fmce1n fmwrn u4 k9f5608u0a-ycb0 29 30 31 32 41 42 43 44 6 13 36 12 37 7 8 9 16 17 18 19 i/o0 i/o1 i/o2 i/o3 i/o4 i/o5 i/o6 i/o7 gnd vss vss vcc vcc r/b re ce cle ale we wp vcc2fm fmrdn fmdata[0..7] vcc2fm vcc2fm fmdata[0..7] fmale disclaimer: this schematic is for reference only. alcor micro corp. makes no warranty for the use of its products and bears no responsibility for any error that appear in this document. specifications are subject to change without notice. fmrbn fmcle fmcle a 23 wednesday, april 02, 2003 1.00 AU9381 64 pin 8 flash memory demostration schematic size document number rev date: sheet of fmale fmcle fmale fmcle fmrbn
mechanical information 26 fmrbn fmale u9 k9f5608u0a-ycb0 29 30 31 32 41 42 43 44 6 13 36 12 37 7 8 9 16 17 18 19 i/o0 i/o1 i/o2 i/o3 i/o4 i/o5 i/o6 i/o7 gnd vss vss vcc vcc r/b re ce cle ale we wp fmrbn fmce7n fmce5n fmdata[0..7] fmce6n fmdata[0..7] vcc2fm u10 k9f5608u0a-ycb0 29 30 31 32 41 42 43 44 6 13 36 12 37 7 8 9 16 17 18 19 i/o0 i/o1 i/o2 i/o3 i/o4 i/o5 i/o6 i/o7 gnd vss vss vcc vcc r/b re ce cle ale we wp vcc2fm fmale fmwrn vcc2fm fmrdn fmce8n cb7 0.1uf fmale vcc2fm cb6 0.1uf u7 k9f5608u0a-ycb0 29 30 31 32 41 42 43 44 6 13 36 12 37 7 8 9 16 17 18 19 i/o0 i/o1 i/o2 i/o3 i/o4 i/o5 i/o6 i/o7 gnd vss vss vcc vcc r/b re ce cle ale we wp cb5 0.1uf cb8 0.1uf fmcle fmcle fmale u8 k9f5608u0a-ycb0 29 30 31 32 41 42 43 44 6 13 36 12 37 7 8 9 16 17 18 19 i/o0 i/o1 i/o2 i/o3 i/o4 i/o5 i/o6 i/o7 gnd vss vss vcc vcc r/b re ce cle ale we wp vcc2fm disclaimer: this schematic is for reference only. alcor micro corp. makes no warranty for the use of its products and bears no responsibility for any error that appear in this document. specifications are subject to change without notice. fmdata[0..7] fmdata[0..7] vcc2fmard fmwrn vcc2fm fmcle fmrdn fmrdn fmrbn a 33 wednesday, april 02, 2003 1.00 AU9381 64 pin 8 flash memory demostration schematic size document number rev date: sheet of fmrdn fmcle fmrbn vcc2fm fmwrn fmwrn
mechanical information 27 8.0 errata record history 03/26/2003 alcor adds 64-pin lqfp information in appendix. besides the standard 48 pin lqfp type package of AU9381, alcor micro provides another package type of 64 pin lqfp to support 8 pieces nand type flash chips application. the features, functionality and application programs are all the same with 48-pin package form factor, customers can use this type package chips for their 8 pieces flash chips solution. 04/24/2003 48-pin schematics: pin name ?vcc2card? changes to pin name ?vccfm?. 64-pin schematics: 26 th -pin r4 resistance value changes from 470k to 47k because of mistyping.

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